EE610: Analog IC design-1 (2025)

Lec 1(1): Why non-linear ckts? 1-port amp. I-V char; operating point & small-signal linear eq. ckt

Lec 1(2): I-V char. of 2-port non-linear network to work as an amp.; Small-signal linear circuit

Lec 2(1): A 45 minute recap/intro to MOSFET: from the point of view of building analog circuits

Lec 2(2): Common-source amplifier: Biasing the transistor

Lec 3(1): Constant-voltage biasing for a common-source amplifier

Lec 3(2): Motivation for constant-current biasing; Drain and source feedback

Lec 4(1): Biasing common-source amplifier with source feedback; pMOS common-source amplifier example

Lec 4(2): Common-drain and common-gate; Resistance looking into the source of a transistor

Lec 5: Evolution of differential amplifier (from common-source to 5-transistor amplifier)

Lec 6(1): Cascode current source; Recap of some common impedances

Lec 6(2): The 5-transistor amplifier: DC operating point

Lec 6(3): The 5-transitor amplifier: Output resistance & Short-circuit transconductance

Lec 7(1): 5-transistor differential amplifier: Is it really an opamp?

Lec 7(2): The 5-T OTA: Common-mode gain & differential mode gain

Lec 7(3): The 5-T OTA: Resistance looking into different nodes

Lec 7(4): Relevance on the range for input common-mode and output

Lec 8(1): Input common-mode range & output swing limits in the 5-T OTA

Lec 8(2): How to learn & analyze analog circuits? eg of flipped & super source follower

Lec 9(1): Difference between a VCVS and VCCS in negative feedback

Lec 9(2): Understanding slewing & slew rate in the 5-T OTA

Lec 9(3): Introduction to telescopic cascode

Lec 9(4): Discussion of a couple of example problems

Lec 10(1): Telescopic cascode, high-swing cascode: Input common-mode range & output swing limits

Lec 10(2): Deriving the folded cascode

Lec 10(3): Folded cascode: swings in unity feedback & advantages over telescopic cascode

Led 11(1): Gain-boosted cascode

Lec 11(2): Poles in circuit: When can pole locations be guessed by inspection?

Lec 12(1): Poles in a circuit: When can poles be guessed by inspection?

Lec 12(2): Zeros in a circuit

Lec 12(3): Example of an uncontrollable/unobservable state

Lec 12(4): Finding poles & zeros in a common-drain structure by inspection

Lec 12(5): Poles & zeros in common-source structure; Intro to Miller effect

Lec 13(1): Can Miller effect be used to find high-freq pole? intuition for pole locations

Lec 13(2): Poles & zeros due to the ac coupling capacitors used for biasing

Lec 14(1): Poles in 5-T OTA; Zeros in differential-mode transfer function

Lec 14(2): Poles & zeros in cascode and telescopic cascode

Lec 14(3): Motivation for multi-stage OTAs

Lec 15(1): Need for DC negative feedback in opamps/OTAs

Lec 15(2): Finding the signs of opamp for negative feedback

Lec 15(3): Discussion of few problems

Lec 16(1): A 25 min recap of the course...

Lec 16(2): Does negative feedback reduce output resistance? Types of negative feedback

Lec 16(3): First-order system in negative feedback; Unity loop gain freq. & closed-loop bandwidth

Lec 17: Understanding frequency compensation via Root Locus; Phase margin; LHP zero vs. RHP zero

Lec 18: Miller compensation; Two-stage Miller compensated OTA; Rough design example

Lec 19(1): Miller compensation: Eliminating the RHP zero

Lec 19(2): Two-stage feedforward compensation

Lec 20(1): Nested Miller & Feedforward compensation

Lec 20(2): Pseudo diff. vs. fully diff. ckts; Need for common-mode feedback in fully diff. ckts.

Lec 21: Common-mode feedback (CMFB) choices & design considerations; 2-stage Miller OTA with CMFB

Cadence demo: Systematic design of a two-stage Miller OTA & tackling the gate parasitic capacitance

Lec 22(1):Two-stage feedforward OTA with current re-use; Common-mode rejection due to CMFB

Lec 22(2): Process variation & random mismatch; Pelgrom's model

Lec 24: Input referred noise voltage & current calculations; Noise & Offset in 5-T OTA

Lec 25: Noise in fully-diff amp; Noise-power trade-off in analog circuits; Noise scaling & FoM

Lec 26(1): Course summary

Lec 26(2): Analog layout basics; what to do post schematic design? Concluding remarks

Intuitively finding small-signal resistances in MOS circuits exploiting one-port non-linearity